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QEMU Timing Analyzer (QTA)

Project
16018 COMPACT
Type
New standard
Description
  • Dynamic cycle accurate worst-case timing analysis of individual SW binaries
  • Preprocessor to import aiT/Absint timing analysis reports
Contact
Wolfgang Müller
Email
wolfgang.mueller@c-lab.de
Technical features

Input(s):

  • WCET annotations of Basic Blocks in aiT/Absint XML export format
  • Compiled SW Binary compliant to the aiT ISA analysis

Main feature(s):

Cycle accurate dynamic timing analysis of the execution of the SW binary

Output(s):

  • Cycle accurate timing of the execution of the SW binary
Integration constraints

Can be integrated with QEMU V4.2 or higher.

Targeted customer(s)
  • SW Engineers
  • Embedded SW Developers
Conditions for reuse

BSD License Agreement.

Confidentiality
Public
Publication date
09-12-2020
Involved partners
University of Paderborn (DEU)